drivers/nand/nand_omap_gpmc.c File Reference

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Detailed Description

FileName: arch/arm/mach-omap/gpmc_nand.c

GPMC has a NAND controller inbuilt. This provides a generic implementation for board files to register a nand device. drivers/nand/nand_base.c takes care of identifing the type of device, size etc.

A typical device registration is as follows:

 static struct device_d my_nand_device = {
        .name = "gpmc_nand",
        .id = some identifier you need to show.. e.g. "gpmc_nand0"
        .map_base = GPMC base address
        .size = GPMC address map size.
        .platform_data = platform data - required - explained below
 };
 platform data required:
 static struct gpmc_nand_platform_data nand_plat = {
        .cs = give the chip select of the device
        .device_width = what is the width of the device 8 or 16?
        .max_timeout = delay desired for operation
        .wait_mon_pin = do you use wait monitoring? if so wait pin
        .plat_options = platform options.
                NAND_HWECC_ENABLE/DISABLE - hw ecc enable/disable
                NAND_WAITPOL_LOW/HIGH - wait pin polarity
        .oob = if you would like to replace oob with a custom OOB.
        .nand_setup  = if you would like a special setup function to be called
        .priv = any params you'd like to save(e.g. like nand_setup to use)
 *};
 then in your code, you'd device_register(&my_nand_device);

Note:

• Enable CONFIG_NAND_OMAP_GPMC_HWECC in menuconfig to get H/w ECC support
• You may choose to register two "devices" for the same CS to get BOTH hwecc and swecc devices.
• You can choose to have your own OOB definition for compliance with ROM code organization - only if you dont want to use NAND's default oob layout. see GPMC_NAND_ECC_LP_x8_LAYOUT etc..

See also:

gpmc_nand_platform_data

Warning:

Remember to initialize GPMC before initializing the nand dev.